Configurable Computing & Embedded Systems

2015 ~ Present | Xilinx Inc., AT&T Inc., NASA

Goals

The objective of the current class project, Configurable Computing and Embedded Systems, is to research and develop high assurance embedded sub-systems to support a variety of critical infrastructure. Our current goal for a technology demonstrator is to create a prototype, fully open source, voting machine. Future demonstrators could include a variety of critical infrastructure systems. This project will explore the use of configurable microelectronics (FPGAs) to assist in areas such as security, trust, and overall design resilience. We will be researching at several levels of the technology stack to include:

  • architecture and formal verification of system control algorithms
  • design and formal verification of a high-assurance pico RISC-V processor
  • development of processor peripherals to interface with hardware
  • physical prototyping of the machine itself

 

Issues Involved or Addressed

Embedded security at the edge of complex networks of machines continues to a prevalent issue in all domains.

We will explore and consider several topics when addressing these issues: hardware/software co-processing/co-simulation; digital design and verification EDA tools; trustworthy computing; root-of-trust hardware; secure computing; the role of open source in assured computing.

 

Methods and Technologies

  • Embedded Computing Systems, e.g. Microcontrollers, RISC-V
  • Embedded Programming, e.g. FPGAs
  • Programmable Logic Devices, e.g. FPGAs
  • Formal Verification and Logic, e.g. SVA, PSL, LTL, Yosys
  • PCB Design, Manufacturing, e.g. KiCad, Soldering
  • Rapid-prototyping, e.g. CAD, 3D-Printing, Wood & Metal Working, DFM

Academic Majors of Interest

  • Computer Science
  • Computer Engineering
  • Electrical Engineering
  • Mathematics

Preferred Interests and Preparation

EE, CmpE – Embedded systems, digital design, computer architecture, FPGAs, configurable computing, computer security, circuits.

CS – Embedded programming, formal logic, automata theory, high-assurance computing

Math – Formal logic, temporal logic (CTL, LTL, PSL), Hoare logic, automated theorem provers, equivalence checking

Other – Makers and designers with interesting in prototyping systems with tight-knit integration of mechanical, electrical, and software elements

 

Meeting Schedule & Location

Time 
2:00-2:50
Meeting Location 
ES&T L1105
Meeting Day 
Thursday

Team Advisors

Dr. Lee Lerner
  • Georgia Tech Research Institute
Dr. Mike Ruiz
  • Georgia Tech Research Institute
William Stuckey
  • Georgia Tech Research Institute

Partner(s) and Sponsor(s)

Xilinx Inc., AT&T Inc., NASA

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